With advances in technology and consumer demand for light and small electronic devices, the volume of electronic components is diminishing, but the semiconductor package structures have complex wire layouts. The wires are getting closer and closer, coupling effect occurs often, and the performances of the electronic components are affected. Many methods have been proposed to reduce the coupling effect between the wires, such as increasing the ground bonding wires. However, this method requires additional chip space or pins.
Therefore, how to reduce the coupling effect between the wires without adding additional chip space or pins is one of the problems to be improved in the field.